Technical Field
The present invention generally relates to power supply regulation and in particular to Dynamic Voltage Frequency Scaling (DVFS).
It finds application in particular, while not exclusively, in components of an Application Specific Integrated Circuit (ASIC), a System on Chip (SoC) circuit or a microprocessor having different requirements on power supply.
Related Art
The approaches described in this section could be pursued, but are not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Reducing the power supply voltage is an efficient method to reduce all types of power consumption of a chip, for example due to switching, short circuit or leakage. However, reducing the power supply voltage for an entire chip might not be possible due to performance constraints. For example, components of an ASIC or a microprocessor have different requirements of power supply voltage due to different critical paths or clock rate.
Therefore, running some components on a lower voltage can save power without sacrificing performance, which is the basic principle of DVFS. Components (or entities) are grouped in power domains, each power domain being supplied by a dedicated power supply. It is thus possible to group together components that have lower requirement of power supply voltage, thus reducing the power voltage supplied to them.
However, standard DVFS has a limited flexibility because any entity which requires a highest operating point (defined by a voltage level and a frequency) of a given power domain will impose its requirement to the other entities of the given power domain.
Another solution is to have a dedicated power supply per entity, but the induced extra cost is too high because of the high number of regulator means, the high silicon area and the high number of pins.
For DVFS on Network on Chip (NoC), entities can be alternatively supplied by a high voltage Vhigh, by a low voltage Vlow or by a power supply unit that generates the local voltage for each unit.
However, such solution is constrained by requirements to have Vhigh and Vlow dimensioned to support all of the entities connected to each of them, i.e. over-dimensioning of power supply units (extra silicon area). In addition, Vhigh and Vlow have a fixed voltage, which is limiting the flexibility of the solution. Furthermore, having one power supply unit per entity leads to extra costs and increased complexity.
Thus, there is a need to optimize power consumption of a system comprising several components having different requirements without drastically increasing the cost of the system.